Mohamed Abdellateef
Dfplayer mini - PIC16F887
2:11
Mohamed Abdellateef
Samsung galaxy tab s3 screen issue
0:39
Mohamed Abdellateef
one-dimensional cellular automaton - rule 153
0:25
Mohamed Abdellateef
Import a cell library into cadence virtuoso
1:37
Mohamed Abdellateef
12-Export cadence schematics as pdf files
5:37
Mohamed Abdellateef
11 Import Synthesized Design Into Cadence Composer Schematic View
13:06
Mohamed Abdellateef
10 conversion from lib to db
4:02
Mohamed Abdellateef
9 Structural modeling verilog
7:18
Mohamed Abdellateef
8 AMS3
11:39
Mohamed Abdellateef
7 AMS2
7:30
Mohamed Abdellateef
6 AMS1
14:07
Mohamed Abdellateef
5 Standard Cell Place and Route SoC Encounter Using Scripts
6:16
Mohamed Abdellateef
4 Standard Cell Place and Route SoC Encounter
43:40
Mohamed Abdellateef
3 RTL Logic Synthesis Design Compiler Using Scripts
3:38
Mohamed Abdellateef
2 RTL Logic Synthesis Design Compiler
22:17
Mohamed Abdellateef
1 Pre Synthesis Simulation Modelsim
3:50
Mohamed Abdellateef
Simulate on Cadence, Plot on MATLAB
16:08
Mohamed Abdellateef
Line Tracking
0:16