Fork, Join, Join Any, Join None Explained | SystemVerilog Threads Made Simple
2ChipDesign
Fork, Join, Join Any, Join None Explained | SystemVerilog Threads Made Simple
4:38
Build Truth Tables the Smart Way, No Mistakes
2ChipDesign
Build Truth Tables the Smart Way, No Mistakes
0:55
Packages and Structs in SystemVerilog
2ChipDesign
Packages and Structs in SystemVerilog
9:11
Build an xor Gate Using a 2 to 1 mux
2ChipDesign
Build an xor Gate Using a 2 to 1 mux
0:53
Binary to Gray Code Explained in Under 60 Seconds
2ChipDesign
Binary to Gray Code Explained in Under 60 Seconds
0:52
4 Bit Ripple Carry Adder Explained in Under 60 Seconds
2ChipDesign
4 Bit Ripple Carry Adder Explained in Under 60 Seconds
0:39
Two’s Complement Explained in 60 Seconds
2ChipDesign
Two’s Complement Explained in 60 Seconds
0:43
Build an xor Gate Using a 4 to 1 mux
2ChipDesign
Build an xor Gate Using a 4 to 1 mux
0:54
Introduction to HDL Design in SystemVerilog
2ChipDesign
Introduction to HDL Design in SystemVerilog
9:53
Blocking vs Non-Blocking — Flip-Flop Example
2ChipDesign
Blocking vs Non-Blocking — Flip-Flop Example
1:02
MUX Explained (4-to-1 Multiplexer)
2ChipDesign
MUX Explained (4-to-1 Multiplexer)
0:51
Find the Fake coins with ONE Weighing
2ChipDesign
Find the Fake coins with ONE Weighing
2:02
SOP to NAND Explained
2ChipDesign
SOP to NAND Explained
0:59
The 17–23 Puzzle A 2000 Digit Number That Starts with 3… What’s the Last Digit
2ChipDesign
The 17–23 Puzzle A 2000 Digit Number That Starts with 3… What’s the Last Digit
2:32
Universal NOR Explained
2ChipDesign
Universal NOR Explained
1:01
UVM Basics (Universal Verification Methodology) Explained Through a Coffee Machine ☕
2ChipDesign
UVM Basics (Universal Verification Methodology) Explained Through a Coffee Machine ☕
19:05
D Flip-Flop Explained
2ChipDesign
D Flip-Flop Explained
0:45
Trailing Zeros for 100! & 200!
2ChipDesign
Trailing Zeros for 100! & 200!
1:51
POS to NOR Explained
2ChipDesign
POS to NOR Explained
1:02
Black & White Hats Riddle
2ChipDesign
Black & White Hats Riddle
2:16
Blocking vs Non-Blocking in SystemVerilog
2ChipDesign
Blocking vs Non-Blocking in SystemVerilog
1:25
Build Logic with Arithmetic AND, OR, NOT using Only + − ×
2ChipDesign
Build Logic with Arithmetic AND, OR, NOT using Only + − ×
1:56
Universal NAND Explained
2ChipDesign
Universal NAND Explained
1:01
4 Buttons, 1 Lamp Beat the Rotating Table
2ChipDesign
4 Buttons, 1 Lamp Beat the Rotating Table
2:37
4-bit Priority Encoder Explained
2ChipDesign
4-bit Priority Encoder Explained
1:15
25 Horses, Find the Top 3 No Stopwatch!
2ChipDesign
25 Horses, Find the Top 3 No Stopwatch!
2:30
The Spiral String Puzzle Geometry Made Simple
2ChipDesign
The Spiral String Puzzle Geometry Made Simple
1:57
The Tunnel Riddle Can They All Cross in 12 Hours?
2ChipDesign
The Tunnel Riddle Can They All Cross in 12 Hours?
1:41
The 3 Bowls Logic Puzzle Explained 🔍 | Classic Interview Brain Teaser
2ChipDesign
The 3 Bowls Logic Puzzle Explained 🔍 | Classic Interview Brain Teaser
1:48
Longitudinal Redundancy Check (LRC) Error Detection
2ChipDesign
Longitudinal Redundancy Check (LRC) Error Detection
1:58
Parity Bit Error Detection
2ChipDesign
Parity Bit Error Detection
2:17
Understanding SPI Protocol
2ChipDesign
Understanding SPI Protocol
2:01
Build (ABC′)′ Using Two Multiplexers | Logic Design Challenge #chipdesign #interviewprep
2ChipDesign
Build (ABC′)′ Using Two Multiplexers | Logic Design Challenge #chipdesign #interviewprep
0:34
I solved 10 Chip Design & Verification Interview Questions for Entry level - Thats what I learned!
2ChipDesign
I solved 10 Chip Design & Verification Interview Questions for Entry level - Thats what I learned!
6:34
Why XOR is the Heart of Parity Checks? #engineeringstudent #digitallogic #engineering #interviewprep
2ChipDesign
Why XOR is the Heart of Parity Checks? #engineeringstudent #digitallogic #engineering #interviewprep
0:45
Setup vs Hold Time — Explained under 60 Seconds #engineering #electricalengineering #digitallogic
2ChipDesign
Setup vs Hold Time — Explained under 60 Seconds #engineering #electricalengineering #digitallogic
0:41
Logic Design for Interviews – MSB Detection With Timing Constraint
2ChipDesign
Logic Design for Interviews – MSB Detection With Timing Constraint
8:39
FSM Interview Question – Detect 1101 with Overlap | Design & Logic Gate Implementation
2ChipDesign
FSM Interview Question – Detect 1101 with Overlap | Design & Logic Gate Implementation
5:58
Max Profit from Stock Prices – Optimal O(n) Solution Explained (Coding Interview Prep)
2ChipDesign
Max Profit from Stock Prices – Optimal O(n) Solution Explained (Coding Interview Prep)
4:32
Race Detector Circuit – Who’s the First Snail to Finish? | Digital Logic Design
2ChipDesign
Race Detector Circuit – Who’s the First Snail to Finish? | Digital Logic Design
5:01
Build a 16-bit Priority Encoder Using 4:2 Encoders | Digital Logic Interview Question
2ChipDesign
Build a 16-bit Priority Encoder Using 4:2 Encoders | Digital Logic Interview Question
7:46
XOR Gate Using Only 2:1 MUX! 🔧 | Digital Logic Shortcut
2ChipDesign
XOR Gate Using Only 2:1 MUX! 🔧 | Digital Logic Shortcut
0:25
Build XOR Gate Using a 4:1 MUX 🔀 | Digital Logic Trick
2ChipDesign
Build XOR Gate Using a 4:1 MUX 🔀 | Digital Logic Trick
0:20
Asked in a Chip Design Interview: Build XOR Using Only These Components!
2ChipDesign
Asked in a Chip Design Interview: Build XOR Using Only These Components!
3:46
🛠️ 2 Ways to Add Enable to a D Flip-Flop
2ChipDesign
🛠️ 2 Ways to Add Enable to a D Flip-Flop
0:29
⚙️ Binary to Gray Code – The Easy Way
2ChipDesign
⚙️ Binary to Gray Code – The Easy Way
0:25
How to Generate a Random Permutation Using Only rand(m) | Efficient Solution + C Code for Inerview
2ChipDesign
How to Generate a Random Permutation Using Only rand(m) | Efficient Solution + C Code for Inerview
6:16
🧠 2’s Complement in Under 30 Seconds!
2ChipDesign
🧠 2’s Complement in Under 30 Seconds!
0:29
🔢 Can You Build a 4-Bit Adder Without Googling?
2ChipDesign
🔢 Can You Build a 4-Bit Adder Without Googling?
0:42
Can You Design a Mod-5 FSM From Scratch? Popular Interview Question Solved Visually
2ChipDesign
Can You Design a Mod-5 FSM From Scratch? Popular Interview Question Solved Visually
3:36
Can You Build a Truth Table Like a Pro? 🧠⚡
2ChipDesign
Can You Build a Truth Table Like a Pro? 🧠⚡
0:49
🧠 Can You Prove This Boolean Identity? x'y + x = y + x
2ChipDesign
🧠 Can You Prove This Boolean Identity? x'y + x = y + x
0:37
Think You’re Ready for Chip Design Interviews? Try This Sorting Puzzle First
2ChipDesign
Think You’re Ready for Chip Design Interviews? Try This Sorting Puzzle First
6:20
Interviewers LOVE This Question: Count 1s Using Only Adders!
2ChipDesign
Interviewers LOVE This Question: Count 1s Using Only Adders!
2:41