@shubhamramani5209

Q-12 XOR gate will also formed

@nipenkumarsahoo7064

It's a nice video

@Stuthiprasadtm

A'B'+A(0) = A'B'=(A+B)'  for NOR Gate using MUX

@sumputamramchamdar998

excellent ,share to us some interview quetions

@nishitdudakiya2082

In question 3 clock generation using Verilog it's very long process I have small line of code for clock generation like:-
#5 always clk =~clk;

@chandrakantamishra630

Excellent ❤

@allvideos9824

I think In 9 question also some mistake is there,5 ff are used to count 0-31 right but ur give 0-32,iam not sure about this but I have doubt 🤔

@hemani7994

I think 12th question answer is xor gate

@jaylovesphysics7331

Infineon, Nxp semiconductor, marvell technology konsi products means kya manufactures karti hai

@allvideos9824

In second question you are swap the answer sister

@ahamadsaifi9947

Q12 is a xor b xor c

@Sheukh-j6m

5 ff used to count 0 to 31 ????

@bhimashankarkattimani7074

Howmuch package if we learn this language?